Reduce cache miss rate
Techniques:
- Larger cache lines
- longer transfer
- more conflict misses
- Larger caches
- higher hit time
- higher cost
- Higher cache associativity
- higher access time
- 8-way associative ~ same miss rate as Fully assiciative cache
- 2-way associative ~ same miss rate as Direct mapped cache with twice the size
- Pseudo associative caches
- similar to open addressing hash table, if slot taken, try another one
- less conflict misses
- regular hit is fast, pseudo hit is slower
- Compiler optimizations to reduce cache misses
- Hardware / software Prefetching